Sandia Labs FY21 LDRD Annual Report


Optical and electronic control of titanium suboxide memory devices for strategically radiation-hardened environments. Many mission applications operate in extreme environments that subject computing components to challenges such as radiation-induced noise and power collapse. This team investigated emerging non- volatile memory and communication architectures with radiation hardness. Titanium oxides provide insulating, semiconducting, and metallic phases relevant to memory devices, and recent discoveries of reversible photo-induced phase transitions could make these attractive candidates for all-optical

computational architectures. Memory arrays, fabricated at Sandia’s MESA semiconductor facility, were found to be robust to 500 kRad(Si) in total ionizing dose experiments. Further experimentation is needed to uncover the physical mechanisms underpinning the observed optically induced phase transitions. (PI: Elliot Fuller) Device arrays (a) titanium suboxide resistive junction in a crossbar array, (b) small section of the crossbar with visible row and column leads, (c) crossbar chip wire bonded into a chip carrier, and (d) chip carrier integrated into a printed circuit board used for measuring the resistance of single junctions or for electrical programming of single junctions. The 50X microscope objective focusing green laser light seen at the junction in (d) is also depicted in (a).

Heterogeneous integration enables miniaturizing and increased performance in next generation systems. Sandia’s vision for heterogeneous integration (HI) is to facilitate future microsystems comprised of disparate technologies with different materials, devices, and suppliers. To that end, LDRD researchers explored the integration of silicon-based electronics with compound semiconductor photonics in future optoelectronic microsystems by leveraging externally-sourced state-of-the-art silicon electronics, Sandia’s radiation-hardened silicon electronic technologies, and Sandia’s custom photonic technologies. To support short interconnects and accommodate differences in materials and processes, the project explored a scalable integration path in which different technologies were fabricated and then integrated as individual die. This approach provides the potential for trusted, robust, high-performance microsystems combining complex electronic functions with optoelectronics having rich bandgap engineering. These developments will lead to miniaturizing and increasing the performance of future communication, radar, and data processing functions in next- generation systems. (PI: Chris Nordquist)

(A) Two 2.5 × 1.5 mm 2 chiplets assembled into a silicon interposer using flip-chip gold thermocompression bonding with bump pitches of 25 µm and 55 µm. (B) A 525 x 435 µm 2 foundry-fabricated silicon RF integrated circuit amplifier flip-chipped onto a silicon interposer with bump pitch of 100 µm. (C) A wire-bonded assembly consisting of silicon electronics and compound semiconductor lasers and photodiodes for electrical-optical conversion.



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